Yağız Ekin Döğer

Analog IPs: Conducted verification and implemented design fixes for analog blocks such as LDO and Bandgap. Additionally, completed the layout of essential blocks from bottom to top, including ADC, Bias Block, and the top level of the chip.

High Bandwidth Linear TIA with RSSI, Integrated ADC, and SPI: Verified existing blocks such as the 12-bit SAR ADC and Temperature Sensor, executed necessary design modifications, and completed layouts for responsible cells, including RF channel, ADC, and digital blocks. Played a significant role in top-level floor planning, routing, and EM/IR checks using Voltus-XFI.

High Bandwidth Linear Driver for Mach-Zender Modulators: Implemented necessary design fixes and verifications for the DC Offset Cancellation Amplifier in the old design. Completed some analog and digital blocks of the chip, including DC Offset Cancellation Amplifier and additional digital blocks. Modified and made necessary changes to the Padring , incorporating ESD structure. Also, responsible for Padring and Top-Level layouts.

2nd Version of High Bandwidth Linear TIA with RSSI, Integrated ADC, and SPI at Different Process: Personally designed two different VGAs (Variable Gain Amplifiers) with a bandwidth of 75GHz and high linearity. Also responsible for the verification of ADC and Temperature Sensor, layout and floor planning of the VGAs, Padring, and Top-Level.

Layout Design of digital blocks and analog blocks including bias and bandgap reference circuits.

Developed amplifier designs, including Two-Stage Differential OTA, Folded Cascode Amplifier, Bandgap reference circuit, Current mirrors, and sources. Independently finalized the layouts for each individual block.

Design of Two-Stage Differential OTA and 5-bit C-DAC. Did necesasry verification for each individual block

Design with Verilog of digital blocks including digital gates, multplixers, clock circuits and cryptology application.

Verified function of each design at FPGA.